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Does paged mode addressing involve 2 sets of packets in succession?

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Does paged mode addressing involve 2 sets of packets in succession?
Posted by passenger1955 on Wednesday, July 26, 2017 4:23 PM

I'm reading about paged mode addressing, and I want to confirm my interpretation. Does paged mode addressing involve sending the decoder 2 separate 3-byte packets in succession? The first packet defines what gets written to the Page register, and the second packet defines what gets written to the data register?  Is that correct?

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Posted by rrinker on Wednesday, July 26, 2017 6:40 PM

 What does the format say? It sounds like you may be confusing it with register mode. I'm in a hotel room with slooooooow internet so I can't really look up the appropriate standard at the moment. 

 If you are rolling your own system - Direct mode is fastest, Direct BIT specifically because it takes as few as 8 queries to determine a CV value. Look at the SPROG  - that's partly why it is one of the fastest programming devices you can get, outside of proprietary stuff like the ESU Lokprogrammer. All modern decoders support direct mode. The older ones that don't - also are lacking many other features which would make me replace any that were that old. REALLY old ones that upport only Register mode - yeah, those need to go as well.

                           --Randy

 


Modeling the Reading Railroad in the 1950's

 

Visit my web site at www.readingeastpenn.com for construction updates, DCC Info, and more.

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Posted by passenger1955 on Thursday, July 27, 2017 2:22 PM

Thanks Randy. Maybe taking a step back, as I read through S 9.2.3 around line 200 it talks about "paged CV Addressing" which gives you access to a larger number of CVs than in the 8 physical registers. I know direct mode (or direct bit) gives you access to 1024 addresses (2 to the 10). Is "paged CV Addressing" something that gives you access to more than the 1024 available with direct?

As I read throught the documentation, its really hard to know what info is the latest-greatest and which info is old-school.

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Posted by rrinker on Thursday, July 27, 2017 5:56 PM

 Well, it's all applicable, because until such time as they revise the standard to not include the older stuff, to be truly NMRA compliant, you have to support it all. ANd it really is a horrible mish-mash of coding, because once they started down one rabbit hole, they couldn't abandon it when someone had a better idea. At the time, when they first started the DCC standards, even that old limited stuff was more than most any other command control system at the time could do (except perhaps the CVP RailCommand, which is what I backed at the time). 

 I still can't download the files to look, but how many bits does paged mode give for the page? I'm pretty sure it doesn't support 1024 CVs,which is why cound decoders started with the indexed CV method to have enough CVs. It needs to be at least 10 bits, if just 8 bits of addressing then there can be no moe than 255.

                             --Randy

 


Modeling the Reading Railroad in the 1950's

 

Visit my web site at www.readingeastpenn.com for construction updates, DCC Info, and more.

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Posted by passenger1955 on Thursday, July 27, 2017 6:16 PM

The direct modes support 10 bits of addresses:

Long-preamble 0 0111CCAA 0 AAAAAAAA 0 DDDDDDDD 0 EEEEEEEE 1

So I can see direct access to 1024 CV addresses.

 

on line 207, "Paged CV Addressing, implements access to all 1024 Configuration Variables through advanced usage of the 8 Physical 'registers' or storage locations..."

Instructions packets using Paged Mode programming are 3 byte packets of the format:

220 long-preamble 0 0111CRRR 0 DDDDDDDD 0 EEEEEEEE 1

RRR= one of the 6 page registers

The packet sequence for Paged CV Addressing involves 2 write steps:

5 or more Writes to the Page Register

3 or more Reset Packets

5 or more Writes to a single Data Register 1-4

 

Confusing stuff. I'm glad to hear the RailCom stuff is more straight-forward.

 

 

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Posted by rrinker on Thursday, July 27, 2017 8:12 PM

 If you look at it, it's all the same thing - just with different bits set ahead of the address information. It shoudl tell you what the various values of 'C' are. That byte starts with 0111, then depending on the value of the next bit it's paged mode or direct mode, in direct mode the value of the next bit is also specified, which then says the remaining 2 bits are part of the address, and the next byte is the remainign 8 bits of the address to make the total fo 10 bits. If the first C is a different value, then the next 3 bits specify one of 8 pages for page mode.

 Way back when I first started with DCC I printed all this stuff out and studied it. First time through it was rathe rconfusing but then I realized I wasn;t reading it carefully - it actually makes sens if you take your time and look at what it is telling you. This is the sam sort of thing as the extended packet format where there are 3 'C' bit variables, and the spec has a table telling you that CCC being 001 is one thing, 010 is another, and 011 is yet another thing. The decoder looks at those bits which tell it what the next byte or bytes it sees mean - a speed, a program command string, a communications request, whatever the definitions of the control bits are. It's all pretty straightforward protocol definition - a command word followed by relevent data. In some cases it's like a double command because they needed to expand the available commands - so a command may mean "the following bits are an additional command" insted of "the followign bits are data for this command". That about as complicated as it gets. The repetition stuff is mostly for redundancy and reliability since in many cases there is no form of acknowledgement. Send the same thing enough times and one is bound to get through, even with the noisy and unreliable model railroad environment.

 There's a crowd that syas DCC is old hat, it hasn't changed in forever, etc. But it HAS - the thing is, the changes have all been backward compatible so a modern system can still run those ancient decoders while at the same time handling the latest 29 function models. The fact that you can een get a 2 way communications with Digitrax Transponding or RailCom on top of a protocol that was never designed to allow 2 way communications is testament to how flexible DCC is. Though RailCom does need a modification to the packet stream fromt he command station, but this can be handled externally without modifying an existing command station.

                            --Randy

 


Modeling the Reading Railroad in the 1950's

 

Visit my web site at www.readingeastpenn.com for construction updates, DCC Info, and more.

  • Member since
    October, 2015
  • 116 posts
Posted by passenger1955 on Wednesday, August 02, 2017 12:26 PM

OK, I think I'm piecing together the story about paged-mode addressing. These 2 links were helpful:

 
 
So it does involve two steps; the first sets the page register (one of 256 pages which gets set on register 6), and the second which writes (or verifies) a data value to one (of 4) CVs in the selected page.
 
The question I'd like to understand now: The packet sequence on line 212 of 9.2.3 is a single sequence with the two steps. So can I assume the user enters the first page-register command, then gets an opportunity to enter the second (CV data) command, and then hits enter, and the command-station executes the two-step packet sequence in one effort (to keep the decoder in service mode throughout the two step operation)?
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Posted by rrinker on Wednesday, August 02, 2017 12:58 PM

 The user enters nothing but a CV number and a value, the command station does all teh heavy lifting to figure the rest fo it out. That applies to every DCC system I'm aware of. Even more so for address programming, the command station figures out the values to send for CV17, CV18, and CV29. All the user has to do is select long or short address and then enter the desired address. That's quite a few programming packets that get generated from just a simpel action by the user.

                               --Randy

 


Modeling the Reading Railroad in the 1950's

 

Visit my web site at www.readingeastpenn.com for construction updates, DCC Info, and more.

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